Analog Design Engineer

About the role

We are seeking a highly motivated Analog Design Engineer with 5–8 years of experience in non‑volatile memory (NVM) design, including EEPROM, Flash, or emerging memories such as ReRAM. The role involves designing high‑performance, reliable memory IPs for automotive and industrial applications.

Key responsibilities

• Design and develop analog and mixed‑signal circuits for NVM IPs (EEPROM, Flash, ReRAM).
• Architect and implement key building blocks such as charge pumps, voltage regulators, bandgaps, oscillators, sense amplifiers, reference circuits, and biasing schemes.
• Collaborate with digital, layout, and validation teams to deliver silicon‑proven designs.
• Perform circuit simulations (DC, AC, transient, Monte Carlo, corner analysis) to ensure robustness across PVT conditions.
• Drive design reviews, failure analysis, and silicon debug activities.
• Support test vehicle development and participate in characterization and qualification.
• Ensure compliance with reliability and automotive standards (e.g., AEC‑Q100 where applicable).
• Contribute to design methodology improvements and documentation.

Required profile

• Bachelor’s or Master’s degree in Electrical Engineering or a related field.
• 5–8 years of experience in analog/mixed‑signal IC design.
• Strong experience with NVM technologies such as EEPROM, Flash, or ReRAM.
• Solid understanding of device physics, reliability, and high‑voltage analog design techniques.

Required skills

• Analog/mixed‑signal IC design.
• Non‑volatile memory (EEPROM, Flash, ReRAM) expertise.
• Cadence Virtuoso, Spectre, and Cadence APS tools.
• Circuit simulation (DC, AC, transient, Monte Carlo, corner analysis).
• Layout collaboration and parasitic‑aware design.
• High‑voltage analog design techniques.
• Design of charge pumps, voltage regulators, bandgap circuits, oscillators, sense amplifiers, reference circuits, and biasing schemes.

What we offer

• Opportunity to work on cutting‑edge memory IP for automotive and industrial markets.
• Competitive benefits package.
• Collaborative environment with cross‑functional engineering teams.